Stone Ridge Technology provides products and services for two different aspects of financial engineering that involve high-performance computing: high-frequency trading and the valuation of complex instruments.
High-Frequency Trading
Interest in high-frequency trading has been growing steadily for several years and financial firms are seeking new solutions to reduce the latency between receiving actionable market information to the formulation and execution of trades. FPGA's are a powerful tool in this race to lower latency. By offloading packet parsing and processing and even doing trade logic and order construction in hardware, latencies in the micro-seconds are achievable. Not only is the latency extremely low but perhaps equally important it is consistent. The spread in latency is very small, much lower than what can be achieved on traditional CPU platforms. In addition the FPGA solution is able to handle significantly higher trade volume with little or no noticeable effect on latencies.
SRT offers the HFT-X system for high frequency trading based on its RDX FPGA hardware and an extension to a NASDAQ ITCH parser developed by SRT partner ImpulseC. It is a great starting point for clients who want a C-programmable option into the world of hardware accelerated high frequency trading. For more information on the HFT-X please view the product page and contact sales@stoneridgetechnology.com

VALUATION
Complex option and derivative valuations are rarely amenable to analytic solutions and thus involve numerical solutions frequently based on Monte Carlo methods. Because the Monte Carlo trajectories are independently calculated and can benefit from massive parallelism, this approach in general maps well to GPU hardware. The NVIDIA Fermi hardware is a particularly good fit because of its double precision performance, often a requirement from financial firms.
SRT has ported a non-trivial options valuation code to GPU hardware. The code treats barrier options with a jump-diffusion process and uses a Brownian-bridge to reduce bias and increase speed. Our results demonstrate greater than 20X improvement over the CPU version of the code. The work will be presented at the NVIDIA 2010 GTC conference in San Jose. Visit the NVIDIA website to see our contribution. Also visit the HPC Toolshed for a white paper.

